There are a couple of questions:
1. I am using two GR5515GGBD (BGA55) and GR5513BEND (QFN40) chips. In the screenshot below you can see that inside each of them has an IO_LDO voltage from it outputs to the external pin VIO_LDO_OUT also IO_LDO feeds the built-in flash memory. The default voltage is set to 1,8V and I understand this is only for chips with internal flash memory (exception GR5515IENDU). In the manual it is written that IO_LDO is not necessary to use, but to supply voltage directly to VIO_LDO_OUT from outside and then the memory will work from the voltage which will be fed to this input. Also from the screenshot you can see that in addition to the memory from VIO_LDO_OUT also takes power for VDDIO0. I have a situation that I need to use 3.3V instead of 1.8V to power VDDIO, but then the memory will work from 3.3V. I have already tried this in a real circuit and so far the memory and the chip are not damaged. My question is: Is it possible to supply 3.3V to the internal memory via VIO_LDO_OUT, and what voltage level is safe for the memory? I would also like to know if it would affect the micro consumption in sleep mode.
2. The manual says that IO_LDO can be disabled via the EFUSE bits. Are these bits one-time programmable? Can these bits be switched back?
Can you tell me please.
1: The Supply Range of the GR5515GGBD (BGA55) and GR5513BEND (QFN40) chips' internal memory is from 1.65 to 2.0V . and the Maximum input Voltage is 2.5V . 3.3v is not a safe voltage level for GR5515GGBD (BGA55) and GR5513BEND (QFN40) chips' internal flash .
2: if you want VDDIO0 be powered by 3.3v ，you can choose GR5515IENDU and GR5513BENDU , GR5515IENDU and GR5513BENDU chips' internal flash supply range is 2.65v to 3.6v.
3: Those all EFUSE bits are one-time programmable ,if they were programmed from 0 to 1 ，we couldn't switch them back .
Thank you for your reply
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