What should be considered when design the RF so that it can works correctly? 4 Answers For designing the embedded hardware? 3 Answers Powering the built-in flash memory from the VIO_LDO_OUT pin for GR5515GGBD, GR5513BEND 2 Answers TFA9882UK/N2Z : Speaker Volume control 2 Answers Discontinuation Notice for TFA9882UK/N2. Does this affect TFA9896UK/N1Z 1 Answer
I use two GR5515GGBD (BGA55) and GR5513BEND (QFN40) chips. In the manuals I could not find an exact answer to the questions:
1. Can I supply a GPIO pin logic level 3.3V if the power supply domain to which it belongs (VDDIO_0 or VDDIO_1) operates from 1.8V? In other words: is the GPIO which operates at 1.8V tolerant to 3.3V (or even higher)?
2. If you can supply 3.3V, will it affect the micro-consumption of the whole chip?
Please help me to understand
The 1.8v IO couldnot be supplied to logic level 3.3V ,the absolute maximum level for 1.8v IO is 1.8v+0.3v .
you can find the absolut maximum rating in in chapter 13 of the datasheet
if you supply 3,3v to 1.8v IO , maybe cause some damage to chipset